1. Field of the Invention
This invention relates to data communications and data delivery over communication media between a host computer and a device, such as in host computer based data acquisition systems.
2. Description of the Relevant Art
In many applications it is necessary or desirable for a host computer system to communicate data with an external device. Various transmission media and protocols exist for enabling communication between a host computer system and an external device. Examples of these types of external transmission media include IEEE 1394, the Universal Serial Bus (USB), and other serial or parallel buses which enable this type of communication.
The IEEE 1394 protocol provides for Direct Memory Access (DMA). DMA is one of the most important features of the bus for data acquisition purposes since it allows a device to transfer data to/from computer memory without microprocessor intervention, thus making it very similar to the PCI bus. One potential application for the IEEE 1394 bus is remote data acquisition and test and measurement. For example, the IEEE 1394 bus may be used to connect a remote data acquisition device or measurement device to a host computer.
One problem that often arises with data transfer between a host computer and an external device is that the overhead costs related to data transfer may become so great that overall performance is substantially degraded. Each time data is transferred over the IEEE 1394 bus using an asynchronous transfer mechanism, in addition to the transmission time required for sending the data itself, a penalty (overhead) in the form of time required to acquire the bus, send the packet header and trailer, and receive an acknowledge message, will be incurred. The overhead for a IEEE 1394 non-compelled device initiated (DI) read transaction may be estimated from the following event sequence:                1) Device requests access to the IEEE 1394 bus (1 to 25 μs)        2) Bus is granted to the device        3) Device sends read request packet to the host computer        4) Host computer receives the request and acknowledges (3 to 5 μs)        5) Host processes request        6) Host computer requests the bus (1 to 25 μs)        7) Bus is granted to the host computer        8) Host transfers data to the device (1 to 41 μs)        9) Device acknowledges data receipt (3 to 5 μs)        
Using the time estimates given in parentheses, a read transaction may take anywhere from 10 to 100 μs, without counting the time required for the host to retrieve data from the memory (which may take several hundred μs). The time estimate variation in steps 1) and 6) is due to possible variances in the IEEE 1394 network topology. A delay between two consecutive transactions must be long enough to allow data to arrive at all nodes on the network. The delay is determined automatically during the bus enumeration process, which in turn occurs each time a device is added to or removed from the bus. The time in step 8) depends on the packet size.
Using the given numbers, the overhead (non-data transfer time) may be estimated to be anywhere from 20% for the larger packets up to 800% for the smaller packets. If one takes into account that the overhead represents lost time that could have been used to transfer more data, sending as large packets as possible becomes a priority. For example, if an overhead of 30 μs is incurred for each 256-byte packet (⅛ of the maximum packet size for 400 Mb/sec transfer rate), ideally, only 256 bytes of data may be transferred every 35 μs, corresponding to a transfer rate of 7 MB/s as compared to the 29 MB/s that would be achieved by using the maximum packet size (2048 bytes). A similar argument applies to DI write transactions.
Most operating systems use a concept of virtual memory to present to the user a larger memory space than the actual physical memory in the computer. As various applications access memory locations outside the computer physical memory, a block of data residing in the computer physical memory that is not currently needed gets swapped with a block from the hard disk containing the memory locations being accessed by the user. After many swaps, a contiguous buffer in the user address space may become scattered throughout the actual physical memory. This may be problematic for a direct memory access (DMA) Controller since it must access host memory using physical, not virtual addresses. A solution is a linked-list structure, referred to as a scatter-gather list, in which each page of the physical memory belonging to the user buffer is described by a node in the list. Once DMA-based data transfer is started, the DMA Controller may parse nodes in the linked list, transferring corresponding data to or from the corresponding memory locations.
The use of a scatter-gather list may cause additional overhead when used with external devices. For example, using 4 KB as a typical OS page size, the time estimates for a IEEE 1394 transaction given above, and the fact that larger packets offer better bus bandwidth utilization, one can calculate that in the worst case after every 200 μs spent on data transfer (two maximum size packets), the device may spend an additional 60 μs fetching the next link in the scatter-gather list from the host memory: a 23% overhead. In the calculation, time spent in step 8 of the 1394 transaction that reads the scatter-gather has been approximated as 0. The overhead may reach 33% for low-level hardware bus bridges that are optimized for transfer of large amounts of data. Such devices may read an entire packet worth of data from the host memory, consume only a small portion containing a single link worth of information, and discard the rest because it may not be possible to determine whether the device is fetching data or data transfer links.
Because of the problems presented above, new and improved systems and methods are desired for transferring data between a host and a device over an external communication medium.